[TriLUG] OT: hd speed with 33MHz and 100MHz controller are the same
Joseph Mack NA3T
jmack at wm7d.net
Wed Jun 13 12:16:05 EDT 2007
On Wed, 13 Jun 2007, Ben Pitzer wrote:
> So where would you expect the data to be cached? Even if it's cached in
> memory, it still has to write it over that 33MHz wire to the disk. The disk
> cache is only for staging data before it actually makes it out to the
> platter, so once it's gone to disk it's forgotten.
I see. Well that clears that up.
> No, basically, if it's
> only got a 33MHz pipe channel between the bus and the proc, that's as good
> as you're going to get. I wouldn't be surprised that the machine is doing
> everything else just fine, and that bus is the only bottleneck you're
> getting.
Thanks Joe
--
Joseph Mack NA3T EME(B,D), FM05lw North Carolina
jmack (at) wm7d (dot) net - azimuthal equidistant map
generator at http://www.wm7d.net/azproj.shtml
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