[TriLUG] Intel bug in the news today

[Matt Flyer via TriLUG]

Back in the late 90's I was working on a masters in computer
engineering.  They put a lot of emphasis on a technique called "score
boarding" that would look forward into the execution path and determine
if there were dependencies - either code or data and rearrange
execution of non dependent items to fill bubbles in the pipeline
process.  For example, if it had to do a multiply operation that would
take 3 micro-clock cycles it would pull non dependent opcodes into the
processor registers and fill the gaps.

It sounds like the technique has advanced to where it attempts to guess
at the dependency value and unwind the operation when it gets it wrong
as a means of getting more ergs out of this type of process.
Unfortunately, it looks like there is a fundamental design flaw that
all the manufacturers adopted.

 On Thu, 4 Jan 2018 05:33:17 -0500
Steve Holton <sph0lt0n at gmail.com> wrote:

> This is probably the best one-paragraph summary we're likely to find
> at this point.
> 
> From: https://security.googleblog.com/2018/01/todays-cpu-
> vulnerability-what-you-need.html
> 
> In order to improve performance, many CPUs may choose to speculatively
> execute instructions based on assumptions that are considered likely
> to be true. During speculative execution, the processor is verifying
> these assumptions; if they are valid, then the execution continues.
> If they are invalid, then the execution is unwound, and the correct
> execution path can be started based on the actual conditions. It is
> possible for this speculative execution to have side effects which
> are not restored when the CPU state is unwound, and can lead to
> information disclosure.
>