[TriLUG] Intel bug in the news today

[David Burton via TriLUG]

Matt, it appears that this *problem* only affects Intel CPUs.

I hope that is true of the *fix*, as well. It seems possible that a
workaround to solve this problem on Intel CPUs *could* clobber performance
on both Intel and AMD CPUs.

Probably not. If the performance hit is as big as they're saying, I would
hope that fix implementers would write in processor-specific checks to
ensure that AMD CPUs (and the newest Intel CPUs) aren't impacted.

Here's a statement from Lenovo:
https://support.lenovo.com/us/en/solutions/len-18282

And please accept my apology for mixing two topics in the same email, and
thus making a hash of this thread.  😞

Dave


On Thu, Jan 4, 2018 at 8:09 AM, Matt Flyer via TriLUG <trilug at trilug.org>
wrote:

> Back in the late 90's I was working on a masters in computer
> engineering.  They put a lot of emphasis on a technique called "score
> boarding" that would look forward into the execution path and determine
> if there were dependencies - either code or data and rearrange
> execution of non dependent items to fill bubbles in the pipeline
> process.  For example, if it had to do a multiply operation that would
> take 3 micro-clock cycles it would pull non dependent opcodes into the
> processor registers and fill the gaps.
>
> It sounds like the technique has advanced to where it attempts to guess
> at the dependency value and unwind the operation when it gets it wrong
> as a means of getting more ergs out of this type of process.
> Unfortunately, it looks like there is a fundamental design flaw that
> all the manufacturers adopted.
>
>  On Thu, 4 Jan 2018 05:33:17 -0500
> Steve Holton <sph0lt0n at gmail.com> wrote:
>
> > This is probably the best one-paragraph summary we're likely to find
> > at this point.
> >
> > From: https://security.googleblog.com/2018/01/todays-cpu-
> > vulnerability-what-you-need.html
> >
> > In order to improve performance, many CPUs may choose to speculatively
> > execute instructions based on assumptions that are considered likely
> > to be true. During speculative execution, the processor is verifying
> > these assumptions; if they are valid, then the execution continues.
> > If they are invalid, then the execution is unwound, and the correct
> > execution path can be started based on the actual conditions. It is
> > possible for this speculative execution to have side effects which
> > are not restored when the CPU state is unwound, and can lead to
> > information disclosure.
>


On Wed, Jan 3, 2018 at 1:54 PM, David Burton <ncdave4life at gmail.com> wrote:

> ...
> Now let's talk about a possible* real *problem. Does anyone know anything
> about the big Intel bug in the news today is? Breathless headlines say the
> fix could slow some workloads by up to 30%:
>
>    - https://www.pcmag.com/news/358249/intel-chips-have-a-
>    major-design-flaw-and-the-fix-means-slowe
>    <https://www.pcmag.com/news/358249/intel-chips-have-a-major-design-flaw-and-the-fix-means-slowe>
>    - https://hothardware.com/news/intel-cpu-bug-kernel-memory-
>    isolation-linux-windows-macos
>    - https://www.theregister.co.uk/2018/01/02/intel_cpu_design_flaw/
>    - http://pythonsweetness.tumblr.com/post/169166980422/the-
>    mysterious-case-of-the-linux-page-table
>    <http://pythonsweetness.tumblr.com/post/169166980422/the-mysterious-case-of-the-linux-page-table>
>
>
> Dave
>